Energy-Aware Memory Management for Embedded Multimedia

Book Preface

Digital systems had initially only one main design metric: performance. Other cost parameters such as area, energy consumption, or testability were regarded as design constraints. In the early nineties, the role of power consumption changed from that of a design constraint to an actual design metric. This shift occurred due to technological reasons: higher integration and higher frequencies led to a significant increase in power consumption.1 The technology used to implement a digital design influences the analysis of the power consumption. For instance, in the complementary metal-oxidesemiconductor (CMOS) device, there are three sources of power dissipation.

The most important source is the switching power Psw, caused by the charging and discharging of load capacitances. The average switching power of a CMOS gate is given by the formula: Psw = 12 CLV 2 ddfclock, where CL is the output load capacitance of the gate, Vdd is the supply voltage, fclock is the clock frequency, and is the switching activity—the probability for a transition to occur at each clock cycle. Low-power design solutions attempt to reduce the load capacitance and/or the switching activity (fclock and Vdd being typically design constraints).

The short-circuit power Psc is another component of power dissipation. It is caused by the current flow between Vdd and ground, originated due to different input and output rise/fall times. This short-circuit current can be kept under control by adequate design of the transition times of devices, so this component accounts for usually less than 5% of the overall power dissipation.

The third component is the leakage power. Whereas an ideal CMOS gate does not dissipate any static power, in practice, leakage currents cause power dissipation even in an off-state. In deep-submicron technologies, smaller supply and threshold voltages have caused this component to become more and more relevant.

This book will largely focus on the reduction of the switching power in the memory subsystem of embedded systems.